With the goal of promoting the technology of power electronics, CPSS TPEA is expected to be a favorable platform to strengthen information exchange in this area through publishing and disseminating research findings worldwide. Authors are cordially invited to submit your papers through the website.

The objective of this journal is to finish the 1st round review within 6 weeks from submission.

CPSS TPEA Vol.9 No.2 (June 30, 2024)

Regular Papers

The High Voltage Gain Coupled Inductor Boost-Zeta DC/DC Converter

X. Fang, X. Lai, X. Wang, and H. Zhao

Abstract This paper presents boost-zeta DC/DC converters utilizing coupled inductors, suitable for applications in the field of new energy power generation. The converters have high voltage gain, lower power switch stress, and cost characteristics. The boost substructure of the converters contains a diode and buffer circuit, which can effectively suppress the voltage spike caused by leakage inductance, and ensure the power level and efficiency of the converters. This paper introduces the working principle and steady-state performance of the improved converter in the case of continuous and intermittent excitation inductor current, and compares it with other coupled inductor DC-DC converters in terms of voltage gain, power switch stress, efficiency, and circuit components. Finally, the improved converter is validated by simulation and experiment. A prototype is built in the laboratory to verify the correctness of the theoretical analysis.

Design of Edge-Enhanced Coil Structure to Obtain Constant Mutual Inductance With Horizontal Misalignment in Wireless Power Transfer Systems of Electric Vehicles

Abstract Horizontal misalignment to the Y and X-axes can be as much as half the side length of a transmitting resonant coil or 10 cm for both dynamic and static wireless power transfer (DSWPT) systems. Misalignment to the Y-axis and X-axis may cause DSWPT systems to malfunction due to fluctuations in mutual inductance. In this paper, a structure of edge-enhanced coil (EEC) is proposed. The mutual inductance expression of the EEC structure is then established. Moreover, the variation of the mutual inductance of the EEC structure is obtained based on the mutual inductance expression. The study demonstrates that the mutual inductance of the EEC structure can be increased while reducing its fluctuation. The problem that quasi-constant mutual inductance is obtained at the expense of mutual inductance value is solved. Therefore, the high transmission efficiency of DSWPT systems can be obtained, and the transmission efficiency and output power can be maintained almost constant with the misalignment to the Y-axis or X-axis. The calculated, simulated, and measured results validating the effectiveness of the EEC structure are shown.

Circulating Current Suppression of Power Conversion Systems Under Unbalanced Conditions: Large-Signal Model-Based Analysis

G. Song, X. Liu, G. Xiao, L. Xiong, B. Chen, and P. Wang

Abstract This paper proposes a large-signal model-based circulating current control approach to achieve the circulating current suppression and power quality improvement for power conversion systems (PCSs) under unbalanced conditions. Specifically, first of all, the adaptive capacitive virtual impedance (VI) is developed based on the change of the current difference to minimize the positive-sequence circulating current (PSCC). The robust droop control is introduced to tune the positive-sequence voltage output and implement the load sharing. Secondly, the negative-sequence reference signal is generated to enable negative-sequence current sharing. The secondary control signal is integrated with the positive-sequence voltage output to modify the voltage reference of the PCS and realize the unbalanced voltage compensation. Finally, the zero-sequence circulating current (ZSCC) controller is proposed by introducing the Q-PR controller and the feedforward term to suppress the ZSCC and attenuate the effect of filtering parameters on zero-axis current. The Lyapunov theory-based stability analysis is provided to prove the stabilization of the system modeled by a large signal. Experiments are presented to demonstrate the effectiveness of the proposed approach.

Design and Implementation of Model Parameter Independent Robust Current Control Scheme of Three-Phase Inverter - A Neural Network-Based Classification Approach

M. V. S. Prasad, K. S. Suprabhath, S. Madichetty, S. Mishra, and A. El Kamel

Abstract In recent years, there has been a notable surge of interest in integrating advanced control techniques within power electronic systems. This article presents the utilization of neural network (NN) controllers within the realm of three-phase inverter control. While traditional control methods like proportional integral-derivative (PID) and pulse width modulation (PWM) have proven effective, they sometimes fall short of meeting the demands of modern applications. These contemporary requirements encompass heightened precision, adaptability to changing conditions, and resilience against uncertainties. This study employs an NN controller to achieve current control in a three-phase standalone inverter system. A dataset is prepared using model predictive control (MPC) to train the neural network model, and appropriate hyperparameters are chosen, facilitating offline learning. The entire setup is implemented within the MATLAB Simulink platform, allowing for an in-depth analysis of its performance. This analysis includes the assessment of prediction errors and the evaluation of total harmonic distortion (THD). In addition, the article conducts a comparative study between the neural network controller and the MPC controller, presenting and discussing the obtained results. Further, the proposed method is realized in the hardware in loop OPAL - RT setup, and the real-time performance is analyzed.

A Step-Up Multilevel Inverter Based on Switched Capacitor Technique With Reduced Components

T. Roy

Abstract This article introduces an innovative single-source-based 19-level switched capacitor multilevel inverter (SCMLI) and its generalized structure. Unlike other SCMLIs, this proposed SCMLI eliminates the need for an H-bridge circuit for polarity generation, thereby reducing the inverter’s total standing voltage (TSV). The article provides a circuit description of the proposed inverter, its operating principle, and the modulation strategy employed. Furthermore, the article outlines an optimal capacitor selection method and conducts various power loss analyses for the 19-level proposed SCMLI. A detailed comparative study with similar SCMLIs shows that the proposed SCMLI achieves higher output voltage levels while utilizing fewer components such as switches, drivers, diodes and capacitors. Furthermore, it offers a more cost-effective function per output voltage level than recently reported similar SCMLIs. An extensive experimental study has been conducted on a prototype of the 19-level SCMLI to validate its performance.

High-Resolution Digital PWM Optimization Method for Critical Path Delay in General FPGA

B. Xu, Q. Xu, P. Guo, Y. Jia, Y. Chen, and A. Luo

Abstract This paper proposes a high-resolution digital pulse width modulator (DPWM) signal optimization method for the critical path delay based on a field programmable gate array (FPGA), which mainly aims to improve the output regulation accuracy and linearity of the DPWM. This method realizes high-resolution and high-linearity DPWM output by constructing the logical symmetric multiplexer and the synchronous 2-to-1 selector for the critical path, and a simple placement constraint is used to reduce the critical path delay deviation. The high-resolution DPWM signal has the advantages of excellent linearity, easy expansion, and strong versatility, thus especially suitable for power electronic switching converters with high frequency, high accuracy, and high real-time control. The simulation and experimental results show that the DPWM with different FPGA achieves a resolution of 312.5 ps and high linearity, where R 2 is up to 0.99999. Finally, the proposed method is verified in a 48 V to 1 V DC/DC converter with a switching frequency of 1 MHz.

An Improved Sequential-Model Predictive Control for an O-Z-Source Inverter Without Weighting Factors

X. Wang and W. Luo

Abstract When finite set model predictive control is applied to an O-Z-source inverter (O-ZSI) containing a transformer, there are multiple control variables, it is difficult to adjust the weighting factors, and the currents on both sides of the transformer could change abruptly, making it impossible to calculate and derive reference values to directly predict and control the currents on both sides of the transformer. In this paper, an improved sequential-model predictive control is proposed for O-ZSI with a transformer without adjusting the weighting factors. By equating the transformer as a parallel connection of the excitation inductance with a set of ideal transformers without adjusting the weighting factors, the reference value of the magnetization current of the excitation inductance can be calculated according to the theoretical derivation, which can realize the predictive control of the O-ZSI. Simulation analysis and experimental results show that the proposed control method achieves the sequential-model predictive control of O-ZSI without adjusting the weight factors, with good steady-state and dynamic characteristics.

Dynamic Current Balancing for Paralleled SiC MOSFETs With Circuit Mismatches Considering Circulating Current in Drive Circuit

Y. He, J. Zhang, and S. Shao

Abstract Parallel operation of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) is necessary for high-power applications. However, the dynamic current sharing of paralleled devices is very sensitive to mismatched circuit parasitic inductances due to their high switching speeds. Symmetric parasitic inductances are usually difficult to realize because of the limitation of circuit layout, especially when more than two devices are paralleled. In this paper, the effects of the circulating current in the drive circuit caused by the circuit mismatches, which result in dynamic current imbalance, are firstly analyzed in detail. The influences of related drive circuit parameters are presented, which reveal the mechanism of dynamic current sharing. Motivated by the analysis, a suppression method of the circulating current is proposed by inserting additional impedances in the drive circuit. Considering the coupling noises introduced by the additional impedances, the concept of blocking unit is proposed to guarantee the proper operation of the drive circuit. A simple circuit implementation and the operation principle are presented. Finally, the drive method is validated by both simulations and experiments. Experimental results show the peak current imbalance is reduced from 16.5% to 3.2% and the maximum switching loss imbalance is reduced by half.

Research on Fault-Tolerant Control Strategy of Open-End Winding Drive With a Common DC Bus Under a Switch Open-Circuit Fault

Z. Zou, S. Yang, Y. Zhang, and X. Zhang

Abstract As the power core of a new energy vehicle, the operation reliability, especially the fault-tolerant operation ability of the electric drive system is directly related with the safety and user experience. The open-end winding topology with a common DC bus demonstrates many advantages and consequently attracts lots of attentions in the application of the new energy vehicles. However, most of existing fault-tolerant solutions for this topology, treat switch open-circuit fault as an open-circuit phase fault, which limits the system's fault-tolerant operation performance. Based on the analysis of the phase current and voltage characteristics after the switch open circuit fault, a fault-tolerant control scheme through biasing the fault-phase current is proposed in this paper, aiming to enhancing the load capability. Through this bias control the fault-phase current is only at one direction, i.e., positive or negative direction as expected, which allows the anti-parallel diode of the open-circuit switch be used to generate the voltage level desired. Therefore, the output voltage is not affected by the fault switch device. As found through mathematical calculation, both the output voltage and the output torque are increased greatly through the proposed fault tolerant scheme. At last, the effectiveness and advantages of proposed scheme is confirmed and demonstrated through experiments.

Optimized PI Gain in UPQC Control Based on Improved Zero Attracting Normalized LMS

S. R. Arya, S. J. Alam, and P. Ray

Abstract An Improved Reweighted Zero Attracting Normalized Least Mean Square (IRZA-NLMS) based control scheme is applied in 4-wire Unified Power Quality Conditioner (UPQC) to mitigate current and voltage-based power quality issues. The IR-ZA-NLMS algorithm has increased efficiency with regard to exploratory rate, steady-state error, and overcoming the drawbacks of NLMS techniques. To raise convergence rate of active signals, the IRZA-NLMS algorithm uses an efficient threshold-based gain function and involvement of zero attracting term is used to determine the inactive signals to their optimum zero stage. In addition to IRZA-NLMS algorithm, a Self-Adaptive Multi Population Rao (SAMP-Rao) optimization is employed to evolve gains of the proportional integral (PI) controller. The SAMP-Rao increases diversity of solution search by splitting total considered population into sub-population groups, each of which searches for the optimal solution in a search space, ensuring that no single individual is trapped in a local minima and allowing for better exploration and exploitation search. The Integral Time Absolute Error objective function is used to optimize the gains of PI controller of DC and AC link voltage. In laboratory environment, the prescribed method is implemented through Micro-lab box processor with MATLAB interface.

15 kV SiC MOSFET: An enabling technology for medium voltage solid state transformers

Alex Q. Huang, Qianlai Zhu, Li Wang, and Liqi Zhang

Review of GaN totem-pole bridgeless PFC

Qingyun Huang and Alex Q. Huang

Design for reliability of power electronics for grid-connected photovoltaic systems

Yongheng Yang, Ariya Sangwongwanich, Frede Blaabjerg

The past, present, and future of power electronics integration technology in motor drives

Thomas M. Jahns and Hang Dai

Bidirectional isolated dual-active-bridge (DAB) DC-DC converters using 1.2-kV 400-A SiC-MOSFET dual modules

Hirofumi Akagi, Shin-ichi Kinouchi, and Yuji Miyazaki

Application of GaN devices for 1 kW server power supply with integrated magnetics

Fred C. Lee, Qiang Li, Zhengyang Liu, Yuchen Yang, Chao Fei, and Mingkai Mu

Data center challenges and their power electronics

Philip T. Krein

Review of power semiconductor device reliability for power converters

Bo Wang, Jie Cai, Xiong Du, and Luowei Zhou

Opening the box: Survey of high power density inverter techniques from the little box challenge

Katherine A. Kim, Yu-Chen Liu, Ming-Cheng Chen, and Huang-Jen Chiu

Analysis and cell-level experimental verification of a 25 kW all-SiC isolated front end 6.6 kV/400 V AC-DC solid-state transformer

Jonas E. Huber, Julian Böhler, Daniel Rothmund, and Johann W. Kolar